JPH0348656B2 - - Google Patents

Info

Publication number
JPH0348656B2
JPH0348656B2 JP57075831A JP7583182A JPH0348656B2 JP H0348656 B2 JPH0348656 B2 JP H0348656B2 JP 57075831 A JP57075831 A JP 57075831A JP 7583182 A JP7583182 A JP 7583182A JP H0348656 B2 JPH0348656 B2 JP H0348656B2
Authority
JP
Japan
Prior art keywords
recess
semiconductor
film
oxide film
thermal oxide
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP57075831A
Other languages
English (en)
Japanese (ja)
Other versions
JPS58192346A (ja
Inventor
Makoto Dan
Tetsunori Wada
Masamizu Konaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Shibaura Electric Co Ltd filed Critical Tokyo Shibaura Electric Co Ltd
Priority to JP57075831A priority Critical patent/JPS58192346A/ja
Publication of JPS58192346A publication Critical patent/JPS58192346A/ja
Publication of JPH0348656B2 publication Critical patent/JPH0348656B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76294Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using selective deposition of single crystal silicon, i.e. SEG techniques

Landscapes

  • Engineering & Computer Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP57075831A 1982-05-06 1982-05-06 半導体装置の製造方法 Granted JPS58192346A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57075831A JPS58192346A (ja) 1982-05-06 1982-05-06 半導体装置の製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57075831A JPS58192346A (ja) 1982-05-06 1982-05-06 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JPS58192346A JPS58192346A (ja) 1983-11-09
JPH0348656B2 true JPH0348656B2 (en]) 1991-07-25

Family

ID=13587521

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57075831A Granted JPS58192346A (ja) 1982-05-06 1982-05-06 半導体装置の製造方法

Country Status (1)

Country Link
JP (1) JPS58192346A (en])

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2547954B1 (fr) * 1983-06-21 1985-10-25 Efcis Procede de fabrication de composants semi-conducteurs isoles dans une plaquette semi-conductrice
JPS60107844A (ja) * 1983-11-16 1985-06-13 Nippon Precision Saakitsutsu Kk 半導体装置の製造方法
JPH0669064B2 (ja) * 1984-03-23 1994-08-31 日本電気株式会社 半導体装置の素子分離方法
US4528047A (en) * 1984-06-25 1985-07-09 International Business Machines Corporation Method for forming a void free isolation structure utilizing etch and refill techniques
US4526631A (en) * 1984-06-25 1985-07-02 International Business Machines Corporation Method for forming a void free isolation pattern utilizing etch and refill techniques
JPS6122645A (ja) * 1984-06-26 1986-01-31 Nec Corp 半導体デバイス用基板およびその製造方法
JPS61128555A (ja) * 1984-11-27 1986-06-16 Mitsubishi Electric Corp 半導体装置
US4556585A (en) * 1985-01-28 1985-12-03 International Business Machines Corporation Vertically isolated complementary transistors
JPH079974B2 (ja) * 1985-10-15 1995-02-01 日本電気株式会社 相補型半導体装置の製造方法
US4929570A (en) * 1986-10-06 1990-05-29 National Semiconductor Corporation Selective epitaxy BiCMOS process
KR880005690A (ko) * 1986-10-06 1988-06-30 넬손 스톤 선택적인 에피켁샬층을 사용한 BiCMOS 제조방법
NL8801981A (nl) * 1988-08-09 1990-03-01 Philips Nv Werkwijze voor het vervaardigen van een halfgeleiderinrichting.
JPH0282551A (ja) * 1988-09-19 1990-03-23 Sanyo Electric Co Ltd 半導体装置の製造方法
US5250461A (en) * 1991-05-17 1993-10-05 Delco Electronics Corporation Method for dielectrically isolating integrated circuits using doped oxide sidewalls
KR100485170B1 (ko) * 2002-12-05 2005-04-22 동부아남반도체 주식회사 반도체 소자 및 이의 제조 방법

Also Published As

Publication number Publication date
JPS58192346A (ja) 1983-11-09

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